Electrical engineering interviews are rigorous and multidisciplinary. Whether you're targeting Apple's hardware team, Tesla's power electronics group, Qualcomm's RF division, or a defense contractor, the core technical foundations are the same — with deep domain questions layered on top.
The EE Interview Loop
Most hardware companies run 4–6 interview rounds:
- Recruiter screen — background, experience summary, comp range
- Technical phone screen — 1–2 circuit analysis or design problems (45 min)
- Onsite / virtual loop:
- Circuit design and analysis
- Power electronics or signal processing (role-dependent)
- Control systems / system-level design
- PCB design and EMC/signal integrity
- Behavioral / culture fit
- Hiring committee review at larger companies (Apple, Google, Qualcomm)
Circuit Analysis Fundamentals
You will be asked to solve circuits by hand. No calculator. No SPICE.
KVL and KCL: Every loop equation, every node equation. Practice writing them fast for multi-mesh circuits. Real question from Qualcomm: "Draw the Thevenin equivalent of this ladder network."
Op-amp circuits you must solve on a whiteboard:
- Inverting and non-inverting amplifier (gain, input impedance)
- Summing amplifier
- Differentiator and integrator (and their stability issues)
- Comparator with hysteresis (Schmitt trigger)
- Instrumentation amplifier: why it exists, when to use it
BJT vs MOSFET tradeoffs — a classic:
- BJT: current-controlled, better for analog, lower 1/f noise in some configurations
- MOSFET: voltage-controlled, better for switching, on-resistance matters in power
- When does a designer choose IGBT over MOSFET? (High-voltage, high-current switching — Tesla's inverter team asks this)
Real question from Apple (analog hardware role): "Design a trans-impedance amplifier for a photodetector. What limits bandwidth? How do you compensate for stability?"
Signal Processing and Frequency Domain
Bode plots: Know how to sketch them without a computer.
- First-order low-pass: -20 dB/decade, 45° phase at corner frequency
- Second-order system: resonance peak, Q factor, underdamped vs overdamped response
- Gain margin and phase margin — what numbers indicate a stable system? (GM > 6 dB, PM > 45° as rules of thumb)
Laplace and Z-transforms: Understand poles and zeros, not just formulas. Interviewers ask: "Move a pole. What happens to transient response?"
Sampling and aliasing:
- Nyquist theorem
- Anti-aliasing filter design before an ADC
- Real question from a defense contractor: "Your ADC samples at 10 MHz. You're measuring a signal with components up to 6 MHz. What's your filter spec?"
ADC/DAC selection criteria:
- Resolution (bits) vs speed vs power
- SAR ADC vs sigma-delta ADC — where each excels
- INL, DNL, ENOB — what they mean and when they matter
Control Systems
Control theory appears heavily in robotics, motor drives, power electronics, and industrial EE roles.
PID controllers — be able to explain each term intuitively:
- P: proportional to error (steady-state error, gain margin)
- I: eliminates steady-state error (but causes overshoot if overdone)
- D: anticipates future error (reduces overshoot, amplifies noise)
- How to tune a PID without simulation? (Ziegler-Nichols method)
State-space representation: Know how to convert a transfer function. "What does controllability mean physically?"
Stability analysis:
- Routh-Hurwitz criterion (how many RHP poles without factoring)
- Root locus — what happens to closed-loop poles as gain increases
- Nyquist criterion — why it matters for systems with time delay
Real question from Tesla Autopilot hardware team: "Design a current controller for a BLDC motor phase. What bandwidth do you target and why?"
Power Electronics and Power Supply Design
Linear vs switching regulators:
- LDO: simple, low noise, poor efficiency when Vin >> Vout
- Buck converter: high efficiency, switching noise, inductor selection
- Boost, buck-boost, flyback — topology selection criteria
- Real question: "Your system needs 3.3 V at 2 A from a 12 V rail. Size the inductor and output capacitor for a buck converter at 500 kHz."
Power supply design considerations:
- Loop compensation (Type II vs Type III compensator)
- Output ripple and its relationship to capacitor ESR
- Thermal derating — MOSFET RDS(on) increases with temperature
Grid-side and utility questions (utilities, Eaton, Schneider):
- Three-phase power, power factor, reactive power
- Per-unit system for power systems analysis
- Protection relaying basics (overcurrent, differential)
PCB Design and Signal Integrity
PCB questions are almost universal at hardware companies. Know these:
Layout best practices:
- Decoupling capacitors: place close to power pins, return path matters
- Ground planes: contiguous copper, avoid slots that interrupt return currents
- Differential pairs: length match, impedance control (typically 100 Ω differential)
EMI and EMC:
- Common-mode vs differential-mode noise
- Guard rings around sensitive analog
- Ferrite beads on power rails — when helpful, when harmful
- Spread-spectrum clocking: why it reduces EMI peak amplitude
Signal integrity:
- Transmission line effects: when does trace length matter? (rule of thumb: >1/6 rise-time length)
- Impedance mismatch and reflections
- Via stubs and their effect at high frequency
Real question from a board-level hardware role at Apple: "Review this PCB layout snippet. Where would you expect EMI issues and what changes would you make?"
Simulation Tools
Be ready to discuss what tools you've used and why:
- SPICE variants (LTspice, HSPICE, Cadence Spectre): transient, AC, DC operating point
- Altium Designer / KiCad: schematic capture, layout, DRC/ERC
- Cadence Allegro / Mentor Xpedition: high-speed PCB design at larger companies
- MATLAB/Simulink: control loop modeling, system simulation
Know your own project history with these tools. Interviewers ask: "Tell me about the hardest signal integrity problem you debugged."
FMEA in Hardware Design
Failure Mode and Effects Analysis (FMEA) comes up at automotive (Tesla, Rivian), defense, and medical device companies.
- What is it? Systematic listing of failure modes, their effects, and severity × occurrence × detection scores
- When is FMEA required? (ISO 26262 for automotive functional safety, MIL-STD-882 for defense)
- Real question: "A comparator in a safety-critical system fails high. Walk through the FMEA for this failure mode."
Behavioral Questions for EE Roles
Behavioral questions test how you work, not just what you know. Prepare specific examples for:
- Debugging a hard hardware failure: "Tell me about a time you found a subtle circuit bug that simulation missed."
- Cross-functional collaboration: "Describe working with firmware or mechanical engineers on a hardware-software interface problem."
- Tradeoff decisions: "Give an example of a design decision where you had to balance performance, cost, and schedule."
- Failure and learning: "Walk me through a board spin you had to do and what caused it."
Use the STAR format (Situation, Task, Action, Result). Have 4–5 stories ready that can flex across different question types.
Company-Specific Notes
Apple (Hardware Engineering): Heavy analog design, signal integrity, deep dive into past projects. Expect to defend every design decision. Privacy-conscious culture — no public sharing of interview details, but Glassdoor confirms circuit-level depth.
Tesla (Power Electronics / Autopilot HW): Power conversion topology questions, motor control theory, thermal management. Fast-paced culture — show you can own a problem end-to-end.
Qualcomm (RF / Mixed-Signal): RF fundamentals (impedance matching, S-parameters, noise figure), ADC/DAC architecture, mixed-signal integration challenges.
Defense contractors (Raytheon, Northrop, L3Harris): Reliability and FMEA, MIL-spec requirements, ITAR compliance awareness. Clearance eligibility is a real factor.
30-Day Preparation Plan
Week 1: Circuit analysis and op-amps. Solve 20+ circuit problems by hand. Review Sedra/Smith or Razavi.
Week 2: Control systems and signal processing. Work through Bode plot construction, root locus sketching, PID intuition.
Week 3: Power electronics and PCB. Read a switching converter application note (TI, Analog Devices). Review one real schematic and its layout.
Week 4: Mock interviews. Answer questions aloud. Time yourself. Prepare 5 STAR behavioral stories.
Practice these questions aloud with AI-powered mock interviews at CareerLift.ai — get real-time feedback on your circuit explanations and behavioral answers before the real thing.